#ifndef __MC31xx_HAL_SPI_H
#define __MC31xx_HAL_SPI_H

#include "mc31xx_hal_def.h"

//SPI初始化结构体
typedef struct
{
    uint32_t Mode;                          //SPI主从选择       
    uint32_t DataSize;                      //数据长度 固定8 不可配置
    uint32_t CLKPolarity;                   //CPOL 时钟极性 串行同步时钟的空闲状态
    uint32_t CLKPhase;                      //CPHA 时钟相位 在第几个跳变沿采样
    uint32_t FirstBit;                      //数据从MSB/LSB开始
    uint32_t BaudRate;                      //波特率
    uint32_t PinNSS;                        //CS脚
    uint32_t PinCLK;                        //时钟脚
    uint32_t PinMOSI;                       //主出脚
    uint32_t PinMISO;                       //主入脚
} SPI_InitTypeDef;

//SPI句柄
typedef struct __SPI_HandleTypeDef
{
  GPCOM_TypeDef             *Instance;      /*!< SPI registers base address               */
  SPI_InitTypeDef           Init;           /*!< SPI communication parameters             */
  uint8_t                   *pTxBuffPtr;    /*!< Pointer to SPI Tx transfer Buffer        */
  uint16_t                  TxXferSize;     /*!< SPI Tx Transfer size                     */
  __IO uint16_t             TxXferCount;    /*!< SPI Tx Transfer Counter                  */
  uint8_t                   *pRxBuffPtr;    /*!< Pointer to SPI Rx transfer Buffer        */
  uint16_t                  RxXferSize;     /*!< SPI Rx Transfer size                     */
  __IO uint16_t             RxXferCount;    /*!< SPI Rx Transfer Counter                  */
  void (*RxISR)(struct __SPI_HandleTypeDef *hspi);   /*!< function pointer on Rx ISR       */
  void (*TxISR)(struct __SPI_HandleTypeDef *hspi);   /*!< function pointer on Tx ISR       */
  HAL_LockTypeDef           Lock;           /*!< Locking object                           */
  __IO uint32_t             ErrorCode;      /*!< SPI Error code                           */

} SPI_HandleTypeDef;


#define SPI_MODE_SLAVE                  (0x00000000U)
#define SPI_MODE_MASTER                 (1)



/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
  * @{
  */
#define SPI_POLARITY_LOW                (0x00000000U)
#define SPI_POLARITY_HIGH               SPI_CR1_CPOL
/**
  * @}
  */

/** @defgroup SPI_Clock_Phase SPI Clock Phase
  * @{
  */
#define SPI_PHASE_1EDGE                 (0x00000000U)
#define SPI_PHASE_2EDGE                 SPI_CR1_CPHA

/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
  * @{
  */
#define SPI_NSS_SOFT                    SPI_CR1_SSM
#define SPI_NSS_HARD_INPUT              (0x00000000U)
#define SPI_NSS_HARD_OUTPUT             (SPI_CR2_SSOE << 16U)

/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
  * @{
  */
#define SPI_FIRSTBIT_MSB                (0x00000000U)
#define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST

#endif
